| Product Overview |
| |
| Leadless packages achieve minimum interconnects by saving the leads and instead making interconnection from the bonding wire to the PCB through tiny terminals or fingers. Through this, leadless packages exhibit smaller dimensions than common leaded packages and demonstrate the capabilities of CSP. Leadless packages are only affected by wire bonding; therefore, the electrical parasitic is under control. To conduct heat effectively, some leadless packages expose the die pad to the ambience. This pad can be soldered to the PCB to provide direct heat conduction and electrical grounding. Leadless packages are very appropriate for low pin count and high frequency ICs (RFICs, analog ICs). At present, ASE offers eight to less than 100 I/O leadless packages. |
|
